Set a current target
Record continuous RMS phase current, then specify peak current and overload duration separately. The selected continuous value alone does not size the FETs, copper, connectors, or protection.
24 V nominal · custom OEM
Screen phase-current, PWM, and cooling targets for a custom PMSM drive-board review. This is an OEM design screen, not a catalog listing or validated board rating.
Published September 25, 2026 · Updated October 3, 2026 · Source review October 3, 2026 · By GanServo
It records three useful design targets and points to the evidence needed next. Board feasibility still depends on the selected motor, power devices, layout, firmware, and enclosure.
Record continuous RMS phase current, then specify peak current and overload duration separately. The selected continuous value alone does not size the FETs, copper, connectors, or protection.
A higher carrier can reduce current ripple in a suitable motor setup, while increasing switching-loss, EMI, and current-sampling demands. Check the actual motor and inverter together.
“Passive” or “baseplate” is only an intended cooling approach. Thermal performance needs device and board loss data, the real mechanical interface, ambient conditions, and temperature measurements.
Low-voltage, high-speed, or low-inductance motors may benefit from a higher inverter switching frequency. A GaN power stage can support fast switching with low reverse-recovery loss, but the achievable result depends on the chosen device, gate drive, commutation, layout, motor, and control implementation.
Higher PWM is not automatically quieter, cooler, or smoother. It can reduce ripple in the right operating conditions, while increasing switching loss and making timing, EMI, and current sampling more demanding. Confirm audible noise and torque ripple on the assembled motor rather than inferring them from the semiconductor alone.
The following checks close the gap between a planning target and a design that is safe to build. The calculator intentionally does not replace these measurements or calculations.
| Review area | Why the three inputs are not enough | Minimum next check |
|---|---|---|
| Loss and temperature | Loss varies with the selected FET/driver, bus and phase waveforms, switching edges, and operating point. | Calculate from component data and measured waveforms; test steady-state temperature at worst-case ambient and duty. |
| Current and protection | Continuous RMS current does not describe peak current, overload duration, regeneration, or fault current. | Provide motor current profiles, bus transients, protection limits, connector ratings, and copper stack-up. |
| PWM, sensing, and EMI | Higher carrier frequency changes switching loss and sensing timing; switching-edge behavior depends on layout and gate control. | Validate current-sampling margin, dead time, ringing, and EMI on the selected board and motor. |
| Cooling and mechanical fit | A baseplate selection does not specify interface material, contact area, enclosure airflow, or thermal resistance. | Share the board outline, mounting/contact surfaces, ambient range, and available airflow for thermal review. |
For related 24 V control timing and manufacturing checks, review the FOC controller timing guide and GanServo's PCBA quality and inspection process.
Source review updated October 3, 2026. These TI reference designs provide traceable examples of three-phase GaN motor-drive engineering; they are not GanServo board specifications or guarantees for this 24 V nominal use case.
| Primary source and date | Published design facts | Limit for this page |
|---|---|---|
| TI TIDA-00909, 48 V / 10 A high-frequency GaN inverterDesign guide Rev. B, April 3, 2017 | The reference design accepts a 12–60 V input, specifies 7 Arms / 10 A peak output current, and was tested up to 100 kHz PWM. | This is a specific 48 V reference design. Its current, dead band, efficiency, and thermal results are not ratings for a GanServo 24 V board. |
| TI TIDA-010276, 36 V / 50 A three-phase GaN inverterDesign guide Rev. A, revised July 2025 | For a 36 V switch-node test, the guide shows a 16.6 ns dead band and separately states that TI recommends more than 50 ns; it also reports motor/inverter measurements under defined conditions. | This BLDC design uses different devices and operating conditions. It shows why dead time must follow the selected hardware and current guide revision; it is not a universal 24 V PMSM setting. |
No. The screen records a nominal bus and operating targets. Current, thermal, power, and board-size limits require a design-specific review and validation plan.
Phase current, PWM frequency, and cooling choice do not define device losses or the board-to-enclosure thermal path. A useful estimate also needs the selected devices, motor waveforms, switching behavior, layout, ambient temperature, and duty cycle.
No. The motor, PWM/control settings, current sensing, mounting, and mechanical resonances affect acoustic noise and torque ripple. Confirm both on the assembled system.
Share the motor datasheet, continuous and peak current profiles, target speed/torque, bus range and transients, PWM target, ambient range, cooling interface, mechanical outline, and expected prototype or production quantity.
Send the operating point with your motor, mechanical, and thermal requirements so engineering can identify the missing checks and define a suitable validation path. For a first-order temperature screen from switch loss and a matched thermal path, use the 24V GaN servo control-board estimator.